Why is the RESET pin set up like this in this Z80 schematic?
$begingroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
Thanks!
z80
$endgroup$
add a comment |
$begingroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
Thanks!
z80
$endgroup$
add a comment |
$begingroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
Thanks!
z80
$endgroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
Thanks!
z80
z80
asked 3 hours ago
Jacob GarbyJacob Garby
1809
1809
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add a comment |
2 Answers
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$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
$endgroup$
add a comment |
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
$endgroup$
add a comment |
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2 Answers
2
active
oldest
votes
2 Answers
2
active
oldest
votes
active
oldest
votes
active
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votes
$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
$endgroup$
add a comment |
$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
$endgroup$
add a comment |
$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
$endgroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
answered 3 hours ago
TransistorTransistor
83.8k783179
83.8k783179
add a comment |
add a comment |
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
$endgroup$
add a comment |
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
$endgroup$
add a comment |
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
$endgroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
edited 3 hours ago
answered 3 hours ago
Jack CreaseyJack Creasey
14.1k2722
14.1k2722
add a comment |
add a comment |
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